Showing results: 661 - 675 of 751 items found.
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Model 52791 -
Pentek, Inc.
- Accepts RF Signals from 925 MHz to 2175 MHz- Programmable LNA handles L-Band input signal levels from -50 dBm to +10 dBm- Programmable analog downconverter provides IF or I+Q baseband signals at frequencies up to 123 MHz- Two 500 MHz 12-bit A/Ds digitize IF or I+Q signals synchronously; optional: 400 MHz 14-bit A/Ds- Two FPGA-based multiband digital downconverters- Xilinx Virtex-7 VX330T or VX690T FPGAs- 4 GB of DDR3 SDRAM- Sample clock synchronization to an external system reference- PCI Express (Gen. 1, 2 & 3) interface, up to x4- Clock/sync bus for multimodule synchronization- Optional user-configurable gigabit serial interface- Optional LVDS connections to the Virtex-7 FPGA for custom I/O- Supports GateXpress® FPGA-PCIe Configuration Manager- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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Model 57821 -
Pentek, Inc.
- Jade Xilinx Kintex UltraScale FPGA Products and Navigator Design Suite Software Video- Jade Xilinx Kintex UltraScale FPGA Family Brochure- Complete radar and software radio interface solution- Supports Xilinx Kintex UltraScale FPGAs- Three 200 MHz 16-bit A/Ds- Three multiband DDCs (digital downconverters)- One DUC (digital upconverter)- Two 800 MHz 16-bit D/As- 5 GB of DDR4 SDRAM- Sample clock synchronization to an external system reference- LVPECL clock/sync bus for multimodule synchronization- PCI Express (Gen. 1, 2 & 3) interface up to x8- Optional LVDS and gigabit serial connections to the FPGA for custom I/O- Compatible with several VITA standards including: VITA-46, VITA-48 and VITA-65 (OpenVPX™ System Specification)- Ruggedized and conduction-cooled versions available- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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Model 58791 -
Pentek, Inc.
- Accepts RF Signals from 925 MHz to 2175 MHz- Two programmable LNAs handle L-Band input signal levels from -50 dBm to +10 dBm- Programmable analog downconverter provides IF or I+Q baseband signals at frequencies up to 123 MHz- Four 500 MHz 12-bit A/Ds digitize IF or I+Q signals synchronously; optional: 400 MHz 14-bit A/Ds- Four FPGA-based multiband digital downconverters- Xilinx Virtex-7 VX330T or VX690T FPGAs- 8 GB of DDR3 SDRAM- Sample clock synchronization to an external system reference- PCI Express (Gen. 1, 2 & 3) interface, up to x8- Clock/sync bus for multimodule synchronization- Optional user-configurable gigabit serial interface- Optional LVDS connections to the Virtex-7 FPGA for custom I/O- Supports GateXpress® FPGA-PCIe Configuration Manager- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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Model 58821 -
Pentek, Inc.
- Jade Xilinx Kintex UltraScale FPGA Products and Navigator Design Suite Software Video- Jade Xilinx Kintex UltraScale FPGA Family Brochure- Complete radar and software radio interface solution- Supports Xilinx Kintex UltraScale FPGAs- Six 200 MHz 16-bit A/Ds- Six multiband DDCs (digital downconverters)- Two DUC (digital upconverter)- Four 800 MHz 16-bit D/As- 10 GB of DDR4 SDRAM- Sample clock synchronization to an external system reference- LVPECL clock/sync bus for multimodule synchronization- PCI Express (Gen. 1, 2 & 3) interface up to x8- Optional LVDS and gigabit serial connections to the FPGA for custom I/O- Compatible with several VITA standards including: VITA-46, VITA-48 and VITA-65 (OpenVPX™ System Specification)- Ruggedized and conduction-cooled versions available- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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Verified Systems International GMBH
The test system cluster architecture is based on dual CPU or 4-CPU PCs acting as cluster nodes. The nodes communicate and synchronise over a high-speed network (Myrinet or InfiniBand). A modification of the Linux operating system allows to run the test execution and evaluation algorithms in hard real-time on reserved CPUs, where scheduling is non-preemptive and controlled by the test system itself. The interrupts caused by interfaces to the system under test may be relayed to CPUs designated explicitly for their handling. This approach offers the opportunity to utilise high-performance standard hardware and the services provided by the widely accepted Linux operating system in combination with all mechanisms required for hard real-time computing. The cluster architecture presents an opportunity to distribute interfaces with high data throughput on different nodes, so that PCI bus overload can be avoided. In addition, the CPU load can be balanced by allocating test data generators, environment simulations and checkers for the behaviour of the system under test ("test oracles") on dedicated CPUs.
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Model 71670 -
Pentek, Inc.
- View product video- Complete radar and software radio interface solution- Supports Xilinx Virtex-6 LXT and SXT FPGAs- Four 1.25 GHz 16-bit D/As- Four digital upconverters- Programmable output levels- 250 MHz max. output bandwidth- 2 GB of DDR3 SDRAM- Sample clock synchronization to an external system reference- Dual µSync clock/sync bus for multimodule synchronization- PCI Express (Gen. 1 & 2) interface, up to x8- Optional user-configurable gigabit serial interface- Optional LVDS connections to the Virtex-6 FPGA for custom I/O- Synchronize up to four modules with Model 7192 System Synchronization and Distribution Amplifier - PMC/XMC- Synchronize up to twelve modules with Model 9192 System Synchronization and Distribution Amplifier- 1U Rack-mount
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779733-02 -
NI
Serial, RS485/RS422 GPIB Instrument Control Device - The GPIB‑RS485 is an IEEE 488 controller device for PCs with RS485 or RS422 ports. You can use this device to integrate an instrument into your system using GPIB. This device transforms a computer with an RS485 or RS422 serial port into a talker, listener, or controller on the GPIB bus. It can also interface RS485 and RS422 instruments and peripherals to the GPIB bus. It can implement the physical and electrical specifications of the IEEE 488, RS485, and RS422 standards, as well as interpret and execute high-level commands from the serial port, including serial‑to‑GPIB, and GPIB‑to‑serial protocol conversions. This device is IEEE 488.2 compatible. The device includes a license for the NI‑488.2 driver software, providing maximum reliability for connecting to third-party instruments with GPIB.
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779733-01 -
NI
Serial, RS485/RS422 GPIB Instrument Control Device - The GPIB‑RS485 is an IEEE 488 controller device for PCs with RS485 or RS422 ports. You can use this device to integrate an instrument into your system using GPIB. This device transforms a computer with an RS485 or RS422 serial port into a talker, listener, or controller on the GPIB bus. It can also interface RS485 and RS422 instruments and peripherals to the GPIB bus. It can implement the physical and electrical specifications of the IEEE 488, RS485, and RS422 standards, as well as interpret and execute high-level commands from the serial port, including serial‑to‑GPIB, and GPIB‑to‑serial protocol conversions. This device is IEEE 488.2 compatible. The device includes a license for the NI‑488.2 driver software, providing maximum reliability for connecting to third-party instruments with GPIB.
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APCI-1500-PULS -
TEAM SOLUTIONS, INC.
PCI interface to the 32-bit data bus Connector compatible to PA 1500 Connector and software compatible to CPCI-1500 16 isolated input channels, 24 V, including 14 interruptible 3 software-programmable counters/ timers 16 isolated output channels, 10 to 36 V, output current 500 mA Timer-programmable watchdog for the reset of the outputs"-PULS" version has a special EEPROM and a TTL IO port added at end of cardDiagnostic report through status register in case of short-circuit, overtemperature, voltage drop or watchdog Interrupt triggered through watchdog, timer, error One ground line for all inputs and one ground line for all outputs
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ERF-5W™ Series (Single & Dual) -
Pole/Zero
The new ERF-5W™ filter takes Pole/Zero’s MINI-ERF® technology to a higher level of RF power handling, with 5W (average) in-band power handling, and covering the entire military tactical radio tuning range of 30-520 MHz in one integrated package. This tunability is accomplished by the use of three poles of selectivity, multiple internal tunable filters along with high performance PIN diode RF band select switches. The tunable filters are designed to minimize size and power consumption, while maintaining high RF power handling and linearity characteristics. Serial control is accomplished via a standard Serial Peripheral Interface (SPI)-based bus.
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Model 52660 -
Pentek, Inc.
- Complete radar and software radio interface solution- Supports Xilinx Virtex-6 LXT and SXT FPGAs- Supports gigabit serial fabrics including PCI Express, Serial RapidIO and Xilinx Aurora- Four 200 MHz 16-bit A/Ds- Up to 2 GB of DDR3 SDRAM or 32 MB of QDRII+ SRAM- Sample clock synchronization to an external system reference- LVPECL clock/sync bus for multiboard synchronization- Optional LVDS connections to the Virtex-6 FPGA for custom I/O- 3U VPX form factors provides a compact, rugged platform- Compatible with several VITA standards including: VITA-46, VITA-48 AND VITA-65 (OpenVPX™ System Specification)- Ruggedized and conduction-cooled versions available
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Model 52662 -
Pentek, Inc.
- Complete radar and software radio interface solution- Supports Xilinx Virtex-6 LXT and SXT FPGAs- Four 200 MHz 16-bit A/Ds- Four multiband DDCs- Up to 2 GB of DDR3 SDRAM- Sample clock synchronization to an external system reference- LVPECL clock/sync bus for multiboard synchronization- Optional LVDS connections to the Virtex-6 FPGA for custom I/O- 3U VPX form factors provides a compact, rugged platform- Compatible with several VITA standards including: VITA-46, VITA-48 AND VITA-65 (OpenVPX™ System Specification)- Ruggedized and conduction-cooled versions available- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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Model 58761 -
Pentek, Inc.
- Supports Xilinx Virtex-7 VXT FPGAs- GateXpress supports dynamic FPGA reconfiguration across PCIe- Four or eight 200 MHz 16-bit A/Ds- Four or eight multiband DDCs- Multiboard programmable beamformer- 4 or 8 GB of DDR3 SDRAM- PCI Express (Gen. 1, 2 & 3) interface up to x8- Sample clock synchronization to an external system reference- LVPECL clock/sync bus formultimodule synchronization- Optional LVDS connections to the Virtex-7 FPGA for custom I/O- Ruggedized and conduction-cooled versions available- Supports GateXpress® FPGA-PCIe Configuration Manager- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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Model 57761 -
Pentek, Inc.
- Supports Xilinx Virtex-7 VXT FPGAs- GateXpress supports dynamic FPGA reconfiguration across PCIe- Four or eight 200 MHz 16-bit A/Ds- Four or eight multiband DDCs- Multiboard programmable beamformer- 4 or 8 GB of DDR3 SDRAM- PCI Express (Gen. 1, 2 & 3) interface up to x8- Sample clock synchronization to an external system reference- LVPECL clock/sync bus formultimodule synchronization- Optional LVDS connections to the Virtex-7 FPGA for custom I/O- Ruggedized and conduction-cooled versions available- Supports GateXpress® FPGA-PCIe Configuration Manager- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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RFFE -
Arasan Chip Systems, Inc.
Mobile phone radios have developed into highly complex, multi-band and multi-standard designs that often have multiple radio frequency (RF) signal chains. The MIPI Alliance Specification for RF Front-End Control Interface (RFFE) was developed to offer a common and widespread method for controlling RF front-end devices. The RFFE Master IP core typically resides in the RFIC in a mobile platform, and utilizes the RFFE bus to identify, program and monitor the registers in RF front end Slave devices through programmed IO. It is designed to support existing standards such as LTE, UMTS, HSPA and EGPRS, and is usable in configurations ranging from single Master/single Slave to multi-Master/multi-Slave.
